Calibration of a loss of signal detection system

Details Calibration of a loss of signal detection system Calibration of a loss of signal detection system

2001-09-07

2004-09-28

Wachsman, Hal (Department: 2857)

Data processing: measuring, calibrating, or testing

Calibration or correction system

Circuit tuning

C702S189000, C341S118000, C341S120000, C327S020000

Reexamination Certificate

active

06799131

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to integrated circuits used in communication systems and more particularly to detection of loss of signal conditions associated therewith.
2. Description of the Related Art
Interruptions occur in data transmission for a variety of reasons such as equipment failure, a cut cable or excessive attenuation of the signal. When such an interruption occurs, it is typical for the intended receiver in the data transmission system to detect the failure condition and inform the communication system of the existence of the failure. Many communication systems specify various aspects of detecting such loss of signal (LOS) conditions. For example, the Synchronous Optical Network (SONET) specification requires that LOS be raised when the synchronous signal (STS-N) level drops below the threshold at which a bit error rate (BER) of 1×10
−3
is predicted.
A clock and data recovery circuit operating in such a communication system typically receives the input data stream as a differential signal. One approach to detecting loss of signal conditions has been to rectify the received signal and compare the received signal to a reference level. Peak detection has also been used. However, such loss of signal techniques has been typically implemented in bipolar technologies. Their implementation in CMOS technologies is difficult. Since it may be desirable to implement various designs in CMOS from cost and ease of manufacturing perspective as well as for power and performance reasons, it would be desirable to have a loss of signal approach that could be implemented ion CMOS.
SUMMARY OF THE INVENTION
Accordingly, in one embodiment of the invention, a method is provided for calibrating a loss-of-signal (LOS) system used in an integrated circuit to determine existence of a loss-of-signal condition according to a loss-of-signal (LOS) threshold value, the LOS threshold value specifying a minimum signal magnitude for received data. A sampling circuit samples a signal indicative of the LOS threshold value and provides a plurality of samples thereof. A calibrated digital representation of a sampling threshold for the sampling circuit is determined according to the samples, the sampling threshold specifying a signal magnitude for a sampled signal above which the sampling circuit samples the sampled signal as a first digital value and below which the sampling circuit samples the sampled signal as a second digital value.
In another embodiment, the invention provides an integrated circuit having a loss of signal (LOS) system for detecting a loss of signal condition for an input data stream according to a LOS threshold, the LOS threshold specifying a minimum signal magnitude used in evaluating the loss of signal condition. The integrated circuit includes a sampling circuit coupled to sample a LOS signal indicative of the LOS threshold. The sampling circuit also receives a sampling threshold specifying the minimum signal magnitude for a sampled signal above which the sampling circuit samples the sampled signal as a first digital value and below which the sampling circuit samples the sampled signal as a second digital value. A digital control circuit is coupled to an output of the sampling circuit and generates a calibrated digital representation of the sampling threshold according to a plurality of samples of the LOS signal.


REFERENCES:
patent: 4973976 (1990-11-01), Lee et al.
patent: 6144415 (2000-11-01), Patton et al.
patent: 6294896 (2001-09-01), Champlin
patent: 6377082 (2002-04-01), Loinaz et al.
patent: 6492929 (2002-12-01), Coffey et al.
Giga, “2.5 Gbit/s Clock and Data Recovery GD16522”, Data Sheet Rev. 20, Giga, Sep. 25, 2000, pp. 1-11.
Maxim, “2.5Gbps, Low-Power,+3.3V Clock Recovery and Data Retiming IC”, Maxim Integrated Products, 1998, pp. 1-8, (No month).

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