Coded data generation or conversion – Converter calibration or testing
Reexamination Certificate
2007-05-22
2007-05-22
Nguyen, Khai M. (Department: 2819)
Coded data generation or conversion
Converter calibration or testing
C341S118000, C341S141000, C341S144000
Reexamination Certificate
active
11297726
ABSTRACT:
Circuitry includes a multiplexer to output first data and second data in response to a clock signal, the clock signal having rising and falling clock edges, where the multiplexer outputs first data at a rising clock edge and outputs second data at a falling clock edge. The circuitry includes a DAC to receive the first data and the second data and to generate, therefrom, complementary first and second signals, a filter to filter the complementary first signals and second signals and thereby produce first and second filtered signals, and a voltmeter to measure a difference between the first and second filtered signals, the difference corresponding to a duty cycle error in the clock signal.
REFERENCES:
patent: 4814872 (1989-03-01), Ivie
patent: 6492798 (2002-12-01), Sunter
patent: 6624772 (2003-09-01), Gealow et al.
patent: 6703820 (2004-03-01), Sunter
patent: 6836227 (2004-12-01), Asami
patent: 2005/0135524 (2005-06-01), Messier
Fish & Richardson P.C.
Nguyen Khai M.
Teradyne, Inc.
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