Calibration circuit

Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – Analysis of complex waves

Reexamination Certificate

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Details

C324S1540PB, C324S601000

Reexamination Certificate

active

06737851

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to calibrating electrical circuits, such as signal filters. In particular, the present invention relates to an electrical calibration circuit.
2. Background and Related Art
Electrical circuits are often fabricated by processes that introduce unexpected or unwanted characteristics. Such characteristics may vary a circuit's performance from its designed specifications. External factors such as temperature can also vary the performance of a circuit.
A Sallen and Key (“SK”) low pass filter is depicted schematically in FIG.
1
. As will be appreciated by those skilled in the art, the illustrated SK filter provides a second-order response. As shown in
FIG. 1
, the SK filter includes a known 1×buffer 1, resistors R
1
and R
2
, and capacitors C
1
and C
2
. A straightforward analysis of the SK filter yields the following transfer function, with R
2
=R
1
:
H

(
s
)
=
1
S
2
+
Wp
Q

S
+
Wp
2
,
(
1
)
where
Wp
=
1
R
1

R
1

C
1

C
2
,


and
(
2
)
1
Q
=
2

R
1

C
2
R
1

C
1
=
2

C
2
C
1
.
(
3
)
SK Filters are often employed in circuits that require precise signal responses. However, such filters are rendered ineffective if their characteristics, such as a cutoff frequency (&ohgr;
c
), are altered in the fabrication process. For example, a design may call for a 10 pF capacitor, but the fabricated capacitor may actually have a capacitance of 11.5 pF. Process variance is particularly problematic for integrated circuits, since integrated components are not easily calibrated.
Conventional calibration techniques, such as calibrating for a precise resistance or capacitance, are insufficient because both resistance and capacitance can vary, and the cutoff frequency (&ohgr;
c
) is a function of the RC product.
Hence, there are many accuracy-related problems to be solved in the art. Accordingly, an electrical calibration circuit is needed in such circuits. There is a further need for an electrical calibration circuit to calibrate signal filters. There is also a need for a calibration method to correct for fabrication variance.
SUMMARY OF THE INVENTION
The present invention is intended to overcome the drawbacks noted above and to provide an effective electrical calibration circuit. The calibration circuit can be used to calibrate integrated electrical circuits, such as filters.
According to a first aspect of the present invention, an apparatus to calibrate a target electrical circuit is provided. The target electrical circuit includes at least a first variable capacitor and a first resistive element. The apparatus includes a second variable capacitor proportionally matched to the first variable capacitor, and a measurement branch. The measurement branch has at least a second resistive element proportionally matched to the first resistive element, and a current generator to generate a current proportionally matched to a predicted current of the target circuit. The apparatus also includes a digital loop to generate a digital code based on at least a comparison between a first voltage signal of the measurement branch and a predetermined voltage.
According to another aspect of the present invention, a method of calibrating a target electrical circuit is provided. The target electrical circuit includes at least a first variable capacitor and a first resistive element. The method includes the steps of: i) matching a second variable capacitor to the first variable capacitor; ii) providing a measurement branch having at least a second resistive element proportionally matched to the first resistive element, and providing a current generator to generate a current proportionally matched to a predicted current of the target circuit; and iii) generating a digital code based on at least a comparison between a first voltage signal of the measurement branch and a predetermined voltage.
According to still another aspect of the present invention, a method of calibrating a target circuit with a calibration circuit is provided. The target, circuit includes at least a first and second variable capacitor, and the calibration circuit includes at least a third variable capacitor. The method includes the steps of: i) proportionally matching components in the calibration circuit with the target circuit; ii) generating a digital code in response to a voltage change in the calibration circuit; and iii) providing the digital code to each of the three variable capacitors.
According to yet another aspect of the present, invention, a calibration circuit is provided. The calibration circuit includes a first capacitor having a plurality of parallel capacitors. At least one parallel capacitor of the plurality of parallel capacitors communicates with a switch, and the switch is operated with a digital signal. The a calibration circuit includes a digital loop having an output in communication with at least the switch of the one parallel capacitor. The digital loop generates a digital signal and communicates the digital signal to at least the switch. The digital signal is varied to reach a steady-state for the calibration circuit.
These and other objects, features and advantages will be apparent from the following description of the preferred embodiments of the present invention.


REFERENCES:
patent: 4570492 (1986-02-01), Walsh
patent: 4851719 (1989-07-01), Hitomi
patent: 5065351 (1991-11-01), Johnston et al.
patent: 5247241 (1993-09-01), Ueda
patent: 5506534 (1996-04-01), Guo et al.
patent: 6191715 (2001-02-01), Fowers
patent: 6307442 (2001-10-01), Meyer et al.
patent: 6583662 (2003-06-01), Lim
patent: WO 99/46867 (1999-09-01), None
patent: WO 00/27079 (2000-05-01), None
patent: WO 00/28663 (2000-05-01), None
patent: WO 00/28663 (2000-05-01), None
patent: WO 00/28691 (2000-05-01), None
patent: WO 00/28691 (2000-05-01), None
patent: WO 00/35094 (2000-06-01), None
patent: WO 00/46867 (2000-08-01), None
U.S. patent application Ser. No. 09/629092, Pierte Roo, filed Jul. 31, 2000.

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