Calibration apparatus for CML circuit test unit

Details Calibration apparatus for CML circuit test unit Calibration apparatus for CML circuit test unit

1980-03-17

1981-10-20

Swisher, S. Clement

Measuring and testing

Instrument proving or calibrating

Volume of flow, speed of flow, volume rate of flow, or mass...

G04F 700, G01R 3102

Patent

active

042953596

ABSTRACT:
An apparatus for calibrating a test unit adapted to characterize CML integrated circuits. The apparatus is adapted to deskew the time delays of each pin of the fixture which receives the CML circuit under test with respect to a certain predetermined pin and preselected pin thereof. The preselected pin and a predetermined pin are shorted and the time delay between the generation of a shaped pulse and its connection through the preselected pin to the predetermined pin and to a test unit is determined by said test unit. The time delays are then utilized to remove any time delays caused by the test apparatus itself so that the CML circuit under test can be accurately characterized.

REFERENCES:
patent: 3560907 (1971-02-01), Heller
patent: 3648168 (1972-03-01), Ripplinger
patent: 3746973 (1973-07-01), McMahon
patent: 4002979 (1977-01-01), Giori et al.
patent: 4068952 (1978-01-01), Erbert et al.
patent: 4090141 (1978-05-01), Leblanc
patent: 4128892 (1978-12-01), Vasa

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