Calibrating the DC-offset of amplifiers

Amplifiers – With amplifier condition indicating or testing means

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330 9, H03F 102

Patent

active

057899746

ABSTRACT:
The dc-offset voltage of an amplifier is calibrated by: (1) configuring the amplifier as a comparator, (2) using the output of the comparator to drive the up/down select input of an up/down counter, and (3) using the output count of the up/down counter to control: (a) a dc-offset correction voltage being: (i) applied across the inputs of the amplifier, or (ii) being used to adjust a voltage which controls an operating parameter of a device in the amplifier, or (b) switches which selectively adjust the effective size or operating conditions of a transistor or other device such that the dc-offset voltage of the amplifier is adjusted corresponding to the value of the output count. At the end of a calibration cycle, the output count of the up/down counter is maintained and is used to: (a) control a voltage which is applied permanently in series with one of the inputs of the amplifier or to an operating parameter control lead of a device in the amplifier, or (b) maintain the position of switches used to adjust the effective size or operating conditions of the transistor or other device in the amplifier to compensate for the offset voltage thereof.

REFERENCES:
patent: 5061900 (1991-10-01), Vinn et al.
patent: 5087914 (1992-02-01), Sooch et al.
patent: 5381148 (1995-01-01), Mueck et al.
patent: 5397944 (1995-03-01), DuPuis
Yu and Geiger, An Automatic Compensation Scheme with Ping-Pong Control of CMOS Operational Amplifiers, May, 1994 Jrnl. of Solid State Circuits, vol. 29, pp. 601-610.

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