Calculation of clock skew using measured jitter buffer depth

Details Calculation of clock skew using measured jitter buffer depth Calculation of clock skew using measured jitter buffer depth

2007-02-13

2007-02-13

Marcelo, Melvin (Department: 2616)

Multiplex communications

Pathfinding or routing

Combined circuit switching and packet switching

C370S517000, C375S371000

Reexamination Certificate

active

10259735

ABSTRACT:
A system and method to measure the clock skew between transmitting and receiving devices operating with independent clock sources over a packet network is described. To provide adaptive playout in an IP telephony device without a sequencing scheme in the packets, the clock skew is measured and recorded. Using a PCM resampler that is implemented with an interpolation filter bank of FIR subfilters, the change in depth of the playout buffer during transmission is analyzed, and this change infers the clock rate associated with the transmission.

REFERENCES:
patent: 5790538 (1998-08-01), Sugar
patent: 5859881 (1999-01-01), Ferraiolo et al.
patent: 7006510 (2006-02-01), Wei
patent: 7092365 (2006-08-01), Tackin et al.

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