Caching information to map simulation addresses to host...

Details Caching information to map simulation addresses to host... Caching information to map simulation addresses to host...

2011-02-01

2011-02-01

Phan, Thai (Department: 2128)

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

Software program

C703S024000, C703S027000, C711S200000, C717S127000

Reexamination Certificate

active

07881921

ABSTRACT:
In computer system simulations, previous translations of simulation virtual addresses to physical host addresses can be remembered in a cache. During execution of a simulation program, the simulated computer system generates a simulation virtual address. The simulation virtual address may be translated to a host address. Information associated with the translation can be cached, and subsequent accesses to the simulation virtual address can use the cached information to compute the host address.

REFERENCES:
patent: 4456954 (1984-06-01), Bullions et al.
patent: 6751583 (2004-06-01), Clarke et al.
patent: 2008/0319730 (2008-12-01), Clark et al.
Qin, et al.; A Technique to Exploit Memory Locality for Fast Instruction Set Simulation; Oct. 24, 2005.

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