Caching for I/O virtual address translation and validation...

Electrical computers and digital processing systems: interprogra – Device driver communication – Virtual device driver

Reexamination Certificate

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C719S321000, C719S326000, C710S003000, C710S004000, C710S009000, C711S001000, C711S002000, C711S003000, C711S200000, C711S202000, C711S203000, C711S205000, C711S206000, C711S207000, C711S208000, C711S209000, C711S212000

Reexamination Certificate

active

06886171

ABSTRACT:
A method and apparatus for input/output virtual address translation and validation assigns a range of memory to a device driver for its exclusive use. The device driver invokes system functionality for receiving a logical address and outputting a physical address having a length greater than the logical address. Another feature of the invention is a computer system providing input/output virtual address translation and validation for at least one peripheral device. In one embodiment, the computer system includes a scatter-gather table, an input/output virtual address cache memory associated with at least one peripheral device, and at least one device driver. In a further embodiment, the input/output virtual address cache memory includes an address validation cache and an address translation cache.

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