Caching and coherency control of multiple geometry accelerators

Computer graphics processing and selective visual display system – Computer graphic processing system – Plural graphics processors

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Details

345501, 345419, G06T 120

Patent

active

059697261

ABSTRACT:
A computer graphics system for rendering graphics primitives based upon primitive data received from a host computer through a graphics interface includes a plurality of geometry accelerators. A distributor divides the primitive data into chunks of primitive data and distributes the chunks to a current geometry accelerator recipient. A state controller is configured to store and resend selected primitive data to the geometry accelerators based upon whether one or more vertices of a graphics primitive are contained in more than one of the chunks of primitive data. Advantageously, this enables the computer graphics system to efficiently process primitive data while avoiding providing the geometry accelerators with an excessive amount of data than necessary for them to render the primitives. Specifically, the state controller includes in the selected primitive data vertex states which were sent to a previous current geometry accelerator recipient and which are required by the current geometry accelerator recipient to assemble at least a portion of the graphics primitive. In addition, the state controller resends the property states to the current geometry accelerator recipient when the currently-stored local state in the current geometry accelerator recipient is not the same as a currently-effective local state. Furthermore, when the resent vertex states include a first and second resent vertex state, the selected primitive data includes property states which changed from when the first vertex state was sent to the previous current geometry accelerator and the second vertex state was sent to the previous current geometry accelerator.

REFERENCES:
patent: 5369738 (1994-11-01), Bremner, III
patent: 5481669 (1996-01-01), Poulton et al.
patent: 5485559 (1996-01-01), Sakaibara et al.
patent: 5517611 (1996-05-01), Deering
patent: 5720019 (1998-02-01), Koss et al.
patent: 5757385 (1998-05-01), Narayanaswami et al.
patent: 5801711 (1998-09-01), Koss et al.
patent: 5812136 (1998-09-01), Keondjian
patent: 5835096 (1998-11-01), Baldwin

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