Cache with a tag duplicate fault avoidance system and method

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Details

395445, 395446, 36424341, 36424345, 364DIG1, G06F 1200

Patent

active

055375707

ABSTRACT:
A method for avoiding a tag duplicate fault. The method includes the steps of using a master - slave tag; selecting a first tag as a master and a second tag as a slave; inhibiting the second tag from initiating a hit signal when the first tag is set for a hit condition, and enabling the second tag to initiate a bit signal when the first tag is set for a miss condition.

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patent: 4254475 (1981-03-01), Cooney et al.
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patent: 4819164 (1989-04-01), Branson
patent: 4821229 (1989-04-01), Jauragui
patent: 4985640 (1991-01-01), Grochowski et al.
patent: 5079440 (1992-01-01), Roberts et al.
patent: 5317718 (1994-05-01), Jouppi
patent: 5386547 (1995-01-01), Jouppi
IBM Technical Disclosure Bulletin "Double Frequency Clock Generator)" Aug. 1991 Nishihara vol. 34, No. 3 pp. 55-57.
"Advanced Clock Controller Cuts Power Needs, Size of Static CMOS Systems" (Electronic Design Oct. 4, 1984) Curtis A Mroz & Walt Niewierski Oct. 1984 pp. 185-191.
"Clocking Subsystems Pace High Performance Logic" (Computer Design Nov. 1, 1987) Jacob Shuhani & Don Draper Nov. 1987 H20, pp. 95-100.
Microprocessor and Peripheral Handbook vol. 1 Microprocessor Intel 1987 p. 53.1, 3-24 BIS 3-25, Fig. 21.

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