Cache tag comparator with read mode and compare mode

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36518907, 364947, 3649472, 364964, 3649642, G06F 1200, G11C 700

Patent

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049071890

ABSTRACT:
A cache TAG, which has a compare mode, an and/or/invert mode, and a read mode, has a programmable comparator which receives an external data signal and an output from an array of memory cells and provides an output to a secondary amplifier. The secondary amplifier provides an output to a match comparator in the compare mode and the and/or/invert mode and to an output buffer in the read mode. The programmable comparator is programmable according to the mode of the cache TAG. The compartor uses selectively enabled transmission gates which provide minimal delay in providing the appropriate data to the secondary sense amplifiers.

REFERENCES:
patent: 4349871 (1982-09-01), Lary
patent: 4493026 (1985-01-01), Olnowich
Motorola MCM 62350, MCM 62351 Cache Tag Comparator, pp. 1-19.

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