Cache system and method for providing software controlled writeb

Details Cache system and method for providing software controlled writeb Cache system and method for providing software controlled writeb

1992-12-18

1996-06-04

Lane, Jack A.

395470, G06F 1208

Patent

active

055242251

ABSTRACT:
A method and mechanism for controlling the data transfers between a system memory and a cache memory is provided. The mechanism includes a cache controller with a physical address register coupled to a bus. Software may alter the operation of the cache controller to force blocks in the cache memory to be written back to the system memory by sending control signals to the physical address register over the bus.

REFERENCES:
patent: 4713755 (1987-12-01), Worley, Jr. et al.
patent: 5247648 (1993-09-01), Watkins
patent: 5263142 (1993-11-01), Watkins et al.
patent: 5307477 (1994-04-01), Taylor et al.

Affiliated with

Also associated with

Rating

Cache system and method for providing software controlled writeb does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Cache system and method for providing software controlled writeb, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Cache system and method for providing software controlled writeb will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-392558