Boots – shoes – and leggings
Patent
1994-01-24
1995-12-12
Kim, Ken S.
Boots, shoes, and leggings
395250, 395375, 36424341, 364DIG1, G06F 906
Patent
active
054758530
ABSTRACT:
A digital computer system capable of processing two or more computer instructions in parallel and having a cache storage unit for temporarily storing machine-level computer instructions in their journey from a higher-level storage unit of the computer system to the functional units which process the instructions. The computer system includes an instruction compounding unit located intermediate to the higher-level storage unit and the cache storage unit for analyzing the instructions and adding to each instruction a tag field which indicates whether or not that instruction may be processed in parallel with one or more neighboring instructions in the instruction stream. These tagged instructions are then stored in the cache unit. The computer system further includes a plurality of functional instruction processing units which operate in parallel with one another. The instructions supplied to these functional units are obtained from the cache storage unit. At instruction issue time, the tag fields of the instructions are examined and those tagged for parallel processing are sent to different ones of the functional units in accordance with the codings of their operation code fields.
REFERENCES:
patent: 4295193 (1981-10-01), Pomerene
patent: 4847755 (1989-07-01), Morrison et al.
patent: 4873629 (1989-10-01), Harris et al.
patent: 4942525 (1990-07-01), Shintani et al.
patent: 5241641 (1993-08-01), Iwasa et al.
Higbee, "Overlapped Operation with Microprogramming", IEEE Transactions on Computers, vol. C27, No. 3, Mar. 1978, pp. 270-275.
Wang et al., "Distributed Instruction Set Computer", Proceedings of the International Conference on Parallel Processing, vol. 1, Aug. 1988, pp. 426-429.
Blaner Bartholomew
Vassiliadis Stamatis
Augspurger Lynn L.
International Business Machines - Corporation
Kim Ken S.
Marhoefer Laurence J.
LandOfFree
Cache store of instruction pairs with tags to indicate parallel does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Cache store of instruction pairs with tags to indicate parallel , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Cache store of instruction pairs with tags to indicate parallel will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1368596