Cache reuse control system having reuse information field in eac

Details Cache reuse control system having reuse information field in eac Cache reuse control system having reuse information field in eac

1994-06-01

1996-08-13

An, Meng-Ai

Boots, shoes, and leggings

395463, 36424341, 36424611, 36424612, 36424613, 364DIG1, 3649642, 3649645, 364964342, 364964341, G06F 1200

Patent

active

055465595

ABSTRACT:
A control system for a cache provided between a central processing unit and a main memory. The control system includes a plurality of entries each having a data area and a control information area. A reuse information field in the control information area is set at the same time as a load/store instruction from the central processing unit. When the central processing unit issues an access instruction to desired data in the main memory, an entry storing the desired data to be accessed is searched from a plurality of entries of the cache. If the desired data is not present in any of the plurality of entries, the desired data is read from the main memory. Then, an empty entry is searched from the plurality of entries. If there is no empty entry, an entry is selected which is not set with the reuse information in the control information area of the entry, the reuse information instructing to preferentially maintaining the data in the data field of the entry. The data of the selected entry is replaced by the data read from the main memory. Reuse information in an access command from the central processing unit for maintaining data in a particular entry is set to the reuse information field.

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Lee, King. "On the Floating Point Performance of the i860.TM. Microprocessor," International Journal of High Speed Computing, vol. 4, No. 4, 1992, pp. 251-267. (English).
Information Processing, vol. 33, No. 11, 1992, pp. 1348-1357 (Japanese).

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