Cache optimization method

Details Cache optimization method Cache optimization method

1994-03-23

2000-10-10

Harrell, Robert B.

Boots, shoes, and leggings

364DIG1, 364DIG2, 364964, 3649642, 36496434, 364243, 3642434, 36424344, 3642435, G06F 1134, G06F 1200

Patent

active

061294586

ABSTRACT:
A cache optimization method which analyzes an existing cache mapping scheme and determines a new cache mapping scheme that eliminates cache collisions. In a first embodiment, an application is traced while running in its main working set by a processor to obtain cache access statistics for objects within the working set under the first caching scheme. The cache access statistics are analyzed to obtain collision information which reveals lines of operating memory that collide in cache memory. Addresses are assigned to the objects using a cache-miss prediction algorithm. If the cache memory is too small to store all of the objects within the working set, the working set is divided into a plurality of working subsets which each contain a smaller number of objects than the working set. Finally, system calls are executed by the processor to effect the second cache mapping scheme. In a second embodiment, a rearrangement of functions within the application is determined using the cache-miss prediction algorithm and the functions are link edited in accordance with the determined rearrangement.

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