Boots – shoes – and leggings
Patent
1980-01-24
1982-03-30
Shaw, Gareth D.
Boots, shoes, and leggings
G06F 930
Patent
active
043227953
ABSTRACT:
An apparatus is disclosed herein for providing faster memory access for a CPU by utilizing a least recently used scheme for selecting a storage location in which to store data retrieved from main memory upon a cache miss. A duplicate directory arrangement is also disclosed for selective clearing of the cache in multiprocessor systems where data in a cache becomes obsolete by virtue of a change made to the corresponding data in main memory by another processor. The advantage of higher overall speed for CPU operations is achieved because of the higher hit ratio provided by the disclosed arrangement. In the preferred embodiment, the cache utilizes: a cache store for storing data; primary and duplicate directories for identifying the data stored in the cache; a full/empty array to mark the status of the storage locations; a least recently used array to indicate where incoming data should be stored; and a control means to orchestrate all these elements.
REFERENCES:
patent: 3845474 (1974-10-01), Lange et al.
patent: 3866183 (1975-02-01), Lange
patent: 3958228 (1976-05-01), Coombes et al.
patent: 3967247 (1976-06-01), Andersen et al.
patent: 4092713 (1978-05-01), Scheuneman
patent: 4195343 (1980-03-01), Joyce
Fisher Richard J.
Lange Ronald E.
Heckler Thomas M.
Holloway, Jr. Wm. W.
Honeywell Information Systems Inc.
Marhoefer L. J.
Prasinos N.
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