Cache memory unit including a replacement address register and a

Details Cache memory unit including a replacement address register and a Cache memory unit including a replacement address register and a

1992-07-02

1996-07-09

Gossage, Glenn

Boots, shoes, and leggings

39542103, 39542109, 395460, 395486, 395494, 395464, 364DIG1, 36424341, 3642472, 3649332, 364948, 3649579, 3649642, 364DIG2, G06F 1212, G06F 1300

Patent

active

055353509

ABSTRACT:
A cache memory unit to be incorporated in a microprocessor reduces overhead caused by cache misses by processing all main memory replacement data at the same time as their registration or storage in the cache memory during a replacement access cycle. For this purpose, the cache memory unit includes a prefetch pointer to store the address for retrieval of cache memory, an address updater to update an internal address of the cache memory, and a cache control circuit to control the cache memory unit. When a cache miss occurs, the address causing the miss is stored in a replacement address register and, until the main memory replacement data is stored in the cache memory, the contents in the replacement address register are output to an internal address bus. On the other hand, the contents in the prefetch pointer are selectively updated.

REFERENCES:
patent: 4095269 (1978-06-01), Kawabe et al.
patent: 4314331 (1982-02-01), Porter et al.
patent: 4802113 (1989-01-01), Onishi et al.
patent: 4888679 (1989-12-01), Fossum et al.
patent: 5285527 (1994-02-01), Crick et al.
patent: 5327536 (1994-07-01), Suzuki

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