Cache memory system having first and second direct-mapped cache

Details Cache memory system having first and second direct-mapped cache Cache memory system having first and second direct-mapped cache

1993-09-30

1996-12-03

Swann, Tod R.

Boots, shoes, and leggings

395444, 3642434, 36424345, 364DIG1, 364DIG2, G06F 1208, G06F 1300

Patent

active

055817254

ABSTRACT:
A microprocessor includes a CPU, a main memory and primary and second cache memories of the direct mapped type, that are all implemented on the same LSI chip. The second cache memory's capacity is not greater than the primary cache memory. The primary and second cache memories are organized in a hierarchical structure so that the primary cache memory is accessed before the secondary cache memory, and when the first cache memory is not hit, the secondary cache memory is accessed. Thus, a high performance microprocessor having a small chip area is constructed by adding a small, high speed secondary cache memory, rather than by increasing the memory capacity of the primary cache memory.

REFERENCES:
patent: 5325503 (1994-06-01), Stevens et al.
patent: 5359723 (1994-10-01), Mathews et al.
patent: 5369753 (1994-11-01), Tipley
patent: 5386547 (1995-07-01), Jouppi
Jouppi, Norman P. "Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefect Buffers", 1990 IEEE International Sumposium on Computer Architecture.
Hennessy, John L. and Patterson, David A., "Computer Architecture: A Quantitative Approach", pp. 408-425. Morgan Kaufman Publishers, Inc. 1990.

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