Cache memory system

Details Cache memory system Cache memory system

1993-02-03

1995-09-26

Popek, Joseph A.

Static information storage and retrieval

Associative memories

Ferroelectric cell

36518907, G11C 1500

Patent

active

054539471

ABSTRACT:
A tag section of a cache memory system comprises a memory for storing a plurality of first address data read out with a small amplitude (e.g., 0.2 Vpp), a circuit for comparing a plurality of second address data, input from the outside of the system, with the plurality of first address data, and providing comparison results with a second amplitude (e.g., 0.8 vpp), an OR logic circuit including a plurality of bipolar transistors having bases to which the comparison results are respectively supplied, collectors connected to a first voltage source, and emitters which are all connected to an emitter dot line, and a circuit for measuring the potential of the emitter dot line by using a reference voltage to determine that all the first and second data coincide with each other. Since a read operation with respect to each tag memory and most hit detecting operations are performed with small-amplitude signals of the ECL level, a high-speed operation can be performed.

REFERENCES:
patent: 4219883 (1980-08-01), Kobayashi et al.
patent: 5218567 (1993-06-01), Suzuki et al.
patent: 5253197 (1993-10-01), Suzuki et al.
patent: 5267190 (1993-11-01), Easley et al.
Kurita, K., et al., "Study of BiCMOS Cache Memory", Trans. IEICE, J71-C, pp. 1442-1449 (Oct. 1988) (In Japanese).

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