Boots – shoes – and leggings
Patent
1988-02-09
1991-10-08
Shaw, Gareth D.
Boots, shoes, and leggings
3642287, 36424341, 36424344, G06F 1516, G06F 1300
Patent
active
050560026
ABSTRACT:
In order to increase a multiprocessing speed, a cache memory is provided with a dual ported storage section so as to be independently accessible by a processor allocated to the cache memory and by another cache memory. The dual ported storage section saves tag addresses and valid tag address information. Each of the tag addresses corresponds to data stored in a data storage section which forms part of the cache. One of two comparators coupled to the dual ported storage section checks to see if an address updated by another cache is in the cache. When this happens, the valid tag address information of the address is invalidated.
REFERENCES:
patent: 4228503 (1980-10-01), Waite et al.
patent: 4349871 (1982-10-01), Lary
patent: 4442487 (1984-04-01), Fletcher et al.
patent: 4503497 (1985-03-01), Krygowski et al.
patent: 4768148 (1988-08-01), Keeley et al.
patent: 4794524 (1988-12-01), Carberry et al.
patent: 4847804 (1989-07-01), Shaffer et al.
Loomis J.
NEC Corporation
Shaw Gareth D.
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