Cache memory device with fast data-write capacity

Details Cache memory device with fast data-write capacity Cache memory device with fast data-write capacity

1989-03-10

1991-07-23

Chan, Eddie P.

Boots, shoes, and leggings

3642434, 36424341, 36424343, 364246, 364254, 3642542, G06F 1202, G06F 702

Patent

active

050348850

ABSTRACT:
A copy-back type cache memory device using a delayed wait method capable of completing a data-write process in one process cycle. The device includes single word memory means for storing the single word of the selected data in a data memory means when an access for a data-write is made, the single word being located at the address in the data memory means corresponding to the processor address; and copy-back memory means for restoring the superseded data along with other data together with which the superseded data forms a block, so that the block can be reorganized in its original state before the data-write process takes place. The device may alternatively include an address latch means for delaying transmission of a processor address from the processor to the data memory means by a predetermined number of process cycles when access by the processor is for a data-write process; and a data latch means for delaying transmission of a processor data from the processor to the data memory means by the predetermined number of process cycles when access by the processor is for a data-write process.

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Sparc Architecture Manual, Sun Microsystems, 1987, pp. 37-41.

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