Cache memory controller and method for reducing CPU idle time by

Boots – shoes – and leggings

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

395425, 364DIG1, G06F 1206, G06F 1300

Patent

active

053865260

ABSTRACT:
A cache memory controller and an associated method for fetching data are utilized to reduce the idle time of a central processing unit (CPU) of a computer system. Control circuitry and a plurality of cache fill status registers are provided to a cache controller to enable a data word to be fetched and returned to the CPU while a cache memory fill initiated due to a prior cache miss is still in progress. The data word is returned if the data word is stored in a main memory location which corresponds to a memory block offset of a main memory block frame currently being mapped into the cache memory. The data word is retrieved and returned to the CPU simultaneous with its writing into the cache memory, if the data word has not been written into the cache memory; otherwise, the data word is retrieved and returned to the CPU at the next dead cycle. As a result, CPU idle time due to cache read misses is reduced.

REFERENCES:
patent: 4691277 (1987-09-01), Kronstadt et al.
patent: 4912631 (1990-03-01), Lloyd
patent: 4994962 (1991-02-01), Mageau et al.
patent: 5073851 (1991-12-01), Masterson et al.
patent: 5148536 (1992-09-01), Witek et al.
patent: 5185871 (1993-02-01), Frey et al.
patent: 5210845 (1993-05-01), Crawford et al.
patent: 5247643 (1993-09-01), Shottan
"Integrated Cache Architecture Optimizes System Bus Performance", Ron Lucier; publication of the Electro 1988 Conference Record, May 10, 1988, Los Angeles, Calif., 54/3, pp. 1-6.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Cache memory controller and method for reducing CPU idle time by does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Cache memory controller and method for reducing CPU idle time by, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Cache memory controller and method for reducing CPU idle time by will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1108032

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.