Cache memory and pre-processor

Details Cache memory and pre-processor Cache memory and pre-processor

1984-05-25

1988-11-29

Cangialosi, Salvatore

Boots, shoes, and leggings

G06F 700

Patent

active

047886560

ABSTRACT:
The invention relates to an apparatus for interfacing between a peripheral device and a host processor. The invented cache memory and pre-processor operates in either an acquisition mode, where it appears to be a memory dedicated to the peripheral, or in a retrieval mode, where it appears to be a memory dedicated to the host microprocessor. For example, the cache memory can be reconfigured from a 2K byte by 16-bit space during the acquisition mode to a 4K byte .times.8-bit space during the retrieval mode, wherein the high and low bytes of the previously defined 16-bit words are interleaved.

REFERENCES:
patent: 4309754 (1982-01-01), Dinwiddie, Jr.
patent: 4462073 (1984-07-01), Grondalski
patent: 4481572 (1984-11-01), Ochsner

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