Cache memory and control circuit

Details Cache memory and control circuit Cache memory and control circuit

1982-05-10

1984-12-04

Zache, Raulfe B.

Boots, shoes, and leggings

340798, 340799, G06F 1300

Patent

active

044868561

ABSTRACT:
A cache memory 30 having a thirteen bit word length is illustrated for storing more than one data word read from a system memory 80 having an eight bit word length and providing the stored words to a video display 18 on a reoccurring basis. The cache memory 30 has a storage capacity sufficient to store the words for one row of display text characters. Two system memory bytes are concatenated by a latch 74 and storage buffer 96 prior to writing into the cache memory 30. After the scanning of the first word of the last scan line in the current cathode ray tube (19) display text row, the first word of the new text row is written into the cache memory (30) from the system memory (80). The write procedure is completed before the last word of the new text row is read from the cache memory 30 to the cathode ray tube display 19 during the writing of the first scan line of the new text row.

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patent: 4169284 (1979-09-01), Hogan et al.
patent: 4195340 (1980-03-01), Joyce
patent: 4197580 (1980-04-01), Chang et al.
patent: 4208716 (1980-06-01), Porter et al.
patent: 4338599 (1982-07-01), Leininger

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