Cache management for multi-processor systems utilizing bulk cros

Details Cache management for multi-processor systems utilizing bulk cros Cache management for multi-processor systems utilizing bulk cros

1990-04-05

1993-03-23

Dixon, Joseph L.

Boots, shoes, and leggings

395425, 3642466, 3642430, 3642565, 3642564, 364DIG1, G06F 1210, G06F 1216

Patent

active

051971399

ABSTRACT:
A store through cache environment managed exclusively grants exclusivity on a large granularity basis. A cross-invalidate is realized for all changed lines via a single transmission when exclusivity is released. A dynamic table that operates in conjunction with a directory look-aside table (DLAT) determines a number of pages that can be held exclusive simultaneously. For adequate operating speed, the special table must be either fully associative or at least set associative. Alternatively, the table can be incorporated into the DLAT. Each DLAT entry is also extended to include a set of "resident" bits and a "valid nonresident" bit. When exclusively is released, the set of local change bits is broadcast to all processors. Upon receipt of such broadcast, the appropriate action is to change the "valid nonresident" indication to read-only and to clear residence bits whose corresponding local change bit is set.

REFERENCES:
patent: 3735360 (1973-05-01), Anderson et al.
patent: 4142234 (1979-02-01), Bean et al.
patent: 4394731 (1983-07-01), Flusche et al.
patent: 4399506 (1983-08-01), Evans et al.
patent: 4400770 (1983-08-01), Chan et al.
patent: 4445174 (1984-04-01), Fletcher
patent: 4463420 (1984-07-01), Fletcher
patent: 4464712 (1984-08-01), Fletcher
patent: 4484267 (1984-11-01), Fletcher
patent: 4503497 (1985-03-01), Krygowski et al.
patent: 4513367 (1985-04-01), Chan et al.
patent: 4622631 (1986-11-01), Frank et al.
patent: 4654778 (1987-03-01), Chiesa etal.
patent: 4755930 (1988-07-01), Wilson, Jr. et al.
patent: 4775955 (1988-10-01), Liu
patent: 4797814 (1989-01-01), Brenza
patent: 4920478 (1990-04-01), Furuya et al.
patent: 4928225 (1990-04-01), McCarthy et al.
patent: 4942578 (1990-07-01), Nakamura
patent: 4977498 (1990-12-01), Rastegar et al.
patent: 4991090 (1991-02-01), Emma et al.
patent: 5016168 (1991-05-01), Liu
patent: 5023776 (1991-06-01), Gregor
patent: 5025366 (1991-06-01), Bardr
patent: 5029070 (1991-07-01), McCarthy et al.
patent: 5032985 (1991-07-01), Curran et al.

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