Cache control system and method for selectively performing a non

Details Cache control system and method for selectively performing a non Cache control system and method for selectively performing a non

1993-11-23

1996-12-17

Gossage, Glenn

395450, 395452, 395838, G06F 1200

Patent

active

055862969

ABSTRACT:
A cache control system and method for operating a computer system which is capable of executing cached and non-cached memory accesses. The cache control system includes a frequency value store for each of a number of memory lines for storing a frequency value indicative of the number of accesses made thereto; an instruction store for storing the index of the last memory line accessed by each of a number of instructions; and control logic which, each time the processor attempts to access a memory location not in the cache memory, tests the frequency value for the last memory line accessed by the current instruction and, if the number of accesses for the memory line exceeds a predetermined threshold, (a) fetches the memory line of the memory location from the main memory into the cache memory and executes a cached memory access, and if not (b) executes a non-cached memory access.

REFERENCES:
patent: 5170476 (1992-12-01), Laakso et al.
patent: 5253351 (1993-10-01), Yamamoto et al.
patent: 5375216 (1994-12-01), Moyer et al.

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