Cache control method and cache controller

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39518318, 395468, G06F 1200

Patent

active

057489858

ABSTRACT:
In a cache controller having a cache disposed between a CPU and a direct access storage for temporarily storing therein data transferred between the CPU and the storage, data is written from the cache into the storage in a write after mode. There is employed an update generation identifier specified by the CPU at each predetermined point of time. When storing data (write after data) from the cache into the storage in the write after mode, the last update generation specified prior to when the data is first written in the cache is set as the update generation of the data. When an update generation is specified by the CPU, write after data having a generation older than the specified generation by a predetermined effective management generation number n or more is preferentially written in the storage. When write after data is lost in the cache due to a failure during execution of a program, old data is read from the storage to execute again the program beginning from a point thereof corresponding to the oldest update generation of write after data, thereby recovering the lost write after data. Alternatively, the write after data is recovered by use of the update journals beginning from a point thereof associated with the oldest update generation.

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Wu et al, "Error Recovery in Shared Memory Multiprocessors Using Private Caches", IEEE Trans on Par. & Dist. Sys., V1, N2, Apr. 1990 pp. 231-240.

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