Cache contained type semiconductor memory device and operating m

Details Cache contained type semiconductor memory device and operating m Cache contained type semiconductor memory device and operating m

1990-06-14

1992-05-05

Bowler, Alyssa H.

Static information storage and retrieval

Magnetic bubbles

Guide structure

365 49, 36518905, 36523003, 364DIG1, G06F 1200, G06F 700, G11C 800

Patent

active

051113864

ABSTRACT:
A dynamic random access memory with a fast serial access mode for use in a simple cache system includes a plurality of memory cell blocks prepared by division of a memory cell array, a plurality of data latches each provided for each column in the memory cell blocks and a block selector. When a cache miss signal is produced by the cache system, data on the column in the cell block selected by the block decoder are transferred into the data latches provided for the columns in the selected block after selection. When a cache hit signal is produced by the cache system, the data latches are isolated from the memory cell array. Accessing is made to at least one of the data latches based on an externally applied column address on cache hit, and to at least one of the columns in the selected block based on the column address on cache miss.

REFERENCES:
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patent: 4577293 (1986-03-01), Matick et al.
patent: 4725945 (1988-02-01), Kronstadt et al.
patent: 4811209 (1989-03-01), Rubenstein
patent: 4901228 (1990-02-01), Kodama
Asakura et al., "An Experimental 1Mb Cache DRAM with ECC", 1989 Symposium on VLSI Circuits (May 25-27, 1989), pp. 43-44.
Asakura et al., "An Experimental 1-Mbit Cache DRAM with ECC", IEEE Journal of Solid-State Circuits, vol. 25, No. 1 (Feb. 1990), pp. 5-10.
Hidaka et al., "The Cache DRAM Architecture: A DRAM with an On-Chip Cache Memory", IEEE Micro (Apr. 1990) pp. 15-24.
"Computer Group News", p. 11, FIG. 4.
J. R. Goodman et al., "The Use of Static Column RAM as a Memory Heirarchy" IEEE 1984, pp. 167-174.
"CHMOS DRAMS-A New Memory Alternative for Digital Processing Applications" pp. 1-276-1-279.
Raymond Pinkham et al., "A High Speed Dual Port Memory with Simultaneous Serial and Random Mode Access for Video Application" IEEE 1984, vol. SC-19, No. 6, Dec. 1984.

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