Cache affinity scheduler

Details Cache affinity scheduler Cache affinity scheduler

1991-08-19

1993-02-09

Richardson, Robert L.

395325, 395775, 395425, G06F 1200, G06F 1516

Patent

active

051858614

ABSTRACT:
A computing system (50) includes N number of symmetrical computing engines having N number of cache memories joined by a system bus (12). The computing system includes a global run queue (54), an FPA global run queue, and N number of affinity run queues (58). Each engine is associated with one affinity run queue, which includes multiple slots. When a process first becomes runnable, it is typically attached one of the global run queues. A scheduler allocates engines to processes and schedules the processes to run on the basis of priority and engine availability. An engine typically stops running a process before it is complete. When the process becomes runnable again the scheduler estimates the remaining cache context for the process in the cache of the engine. The scheduler uses the estimated amount of cache context in deciding in which run queue a process is to be enqueued. The process is enqueued to the affinity run queue of the engine when the estimated cache context of the process is sufficiently high, and is enqueued onto the global run queue when the cache context is sufficiently low. The procedure increases computing system performance and reduces bus traffic because processes will run on engines having sufficient cache affinity, but will also run on the best available engine when there is insufficient cache context.

REFERENCES:
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patent: 4414624 (1983-11-01), Summer et al.
patent: 4638427 (1987-01-01), Martin
patent: 4695951 (1987-09-01), Hooker
S. Curran & M. Stumm, "A Comparison of Basic CPU Scheduling Algorithms for Multiprocessor UNIX," Computing Systems, vol. 3, No. 4, Fall 1990.
Symmetry Series Computers manufactured by Sequent Computing Systems as described on pp. 1-9 of the present application.

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