C-MOS address buffer for semiconductor memory

Details C-MOS address buffer for semiconductor memory C-MOS address buffer for semiconductor memory

1988-01-07

1989-04-25

Moffitt, James W.

Static information storage and retrieval

Addressing

365189, 307269, G11C 800

Patent

active

048254207

ABSTRACT:
A C-MOS address buffer for use in a semiconductor memory device is clocked by an inverted column address strobe signal .phi..sub.CAL of an external column address strobe signal CAS. The signal .phi..sub.CAL is supplied to the drain of a feedback transistor in a schmitt trigger and is reinverted to provide a signal corresponding to the address strobe signal CAS. This signal is coupled to the gate of a transistor which controls the application of a supply voltage to the schmitt trigger circuit. Invalid timing address signals between the address input signal Ai and the clock signal comprising the signal .phi..sub.CAL are thus prevented. Also sufficient address set up time and hold time are guaranteed.

REFERENCES:
patent: 4581549 (1986-04-01), Aoyama et al.
patent: 4581718 (1986-04-01), Oishi

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