Byte-wide elasticity buffer

Details Byte-wide elasticity buffer Byte-wide elasticity buffer

1989-12-01

1993-02-09

Shaw, Dale M.

Boots, shoes, and leggings

364DIG1, 3642397, 3642601, 364DIG2, 3649393, H04L 100, H04L 2540, G08C 2500

Patent

active

051858630

ABSTRACT:
A network station's elasticity buffer includes a memory core together with write and read pointer logic. The memory core includes a START area and a CONTINUATION area which is a cyclic buffer. Under normal conditions, the read pointer follows the write pointer cyclically in the CONTINUATION area. However, upon detection of a start delimiter or upon station reset, the pointers recenter to the START area. Separate synchronizing logic is provided for each of the two recentering modes to reduce metastability problems caused by asynchronous sampling of data. A delay-by-one mechanism is built into the start delimiter mode synchronization scheme so that, under certain conditions, the read pointer is held in the CONTINUATION area for an additional read so an early sample of the read-start signal by the station's local clock while the read pointer is well behind the write pointer will not drop the last character of the previous frame when that frame is not separated from the next start delimiter by a sufficient interframe gap. A look-ahead-look-current detector insures that the there is not too much initial separation between the write pointer and the read pointer. A delay-GO mechanism is built into the reset mode synchronization scheme to prevent irregular dropping of line state characters when the local byte clock is trapped within the metastability window while clock drift is infinitesimal. The read pointer logic also includes a mechanism for preventing the delay-GO mechanism from creating too much initial separation between the write pointer and the read pointer.

REFERENCES:
patent: 4688210 (1987-08-01), Eizanhofer et al.
patent: 4703486 (1987-10-01), Bemis
patent: 4797951 (1989-01-01), Duxbury et al.
patent: 4849970 (1989-07-01), McCool
patent: 4945548 (1990-07-01), Iannarone et al.
patent: 4979107 (1990-12-01), McCool
patent: 4984251 (1991-01-01), Perloff et al.
patent: 5043981 (1991-08-01), Firoozmand et al.
patent: 5046182 (1991-09-01), Namstra et al.
"Data Communication Jitter Remover", Research Disclosure, #285 Jan. 1988, p. 57, Disclosure #28581.
F. E. Ross, "FDD1-An Overview", 32th IEEE Computer Society International Conference, Feb. 1987, pp. 23-27.

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