Byte wide EEPROM with individual write circuits

Static information storage and retrieval – Floating gate – Particular biasing

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Details

365195, 365189, G11C 700, G11C 1140

Patent

active

045660808

ABSTRACT:
A memory system of the EEPROM type in which a separate writing circuit is provided for each cell of a related byte thereby permitting one cell to be charged while the other can be simultaneously discharged.

REFERENCES:
patent: 4090258 (1978-05-01), Cricchi
patent: 4149270 (1979-04-01), Cricchi et al.
patent: 4354256 (1982-10-01), Miyasaka
patent: 4377857 (1983-03-01), Tickle
patent: 4477884 (1984-10-01), Iwahashi et al.

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