Patent
1996-05-17
1998-05-05
Donaghue, Larry D.
395391, 395392, 395380, G06F 1578, G06F 1582
Patent
active
057489785
ABSTRACT:
An apparatus for aligning variable byte length instructions to a plurality of issue positions is provided. The apparatus includes a byte queue divided into several subqueues. Each subqueue is maintained such that a first instruction in program order within the subqueue is identified by information stored in a first position within the subqueue, a second instruction in program order within the subqueue is identified by information stored in a second position within the subqueue, etc. When instructions from a subqueue are dispatched, remaining instructions within the subqueue are shifted such that the first of the remaining instructions (in program order) occupies the first position, etc. Instructions are shifted from subqueue to subqueue when each of the instructions within a particular subqueue have been dispatched. The information stored in one subqueue is shifted as a unit to another subqueue independent of the internal shifting of subqueue information. The subqueues are additionally configured to handle instructions which overflow from a first subqueue into a second subqueue. Information pertaining to the overflowing instructions is maintained in the last position within the first subqueue. The information is not shifted when other positions within the subqueue are shifted. In this manner, information regarding an overflowing instruction is again located in a limited number of positions.
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Narayan Rammohan
Tran Thang M.
Advanced Micro Devices , Inc.
Donaghue Larry D.
Kivlin B. Noel
Merkel Lawrence J.
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