Boots – shoes – and leggings
Patent
1993-08-13
1996-10-22
Teska, Kevin J.
Boots, shoes, and leggings
364247, 3642549, 3642592, 3642598, 3642624, 36426281, 364DIG1, G06F 702, G06F 900
Patent
active
055686249
ABSTRACT:
A high-performance CPU of the RISC (reduced instruction set) type employs a standardized, fixed instruction size, and permits only simplified memory access data width and addressing modes. The instruction set is limited to register-to-register operations and register load/store operations. Byte manipulation instructions, included to permit use of previously-established data structures, include the facility for doing in-register byte extract, insert and masking, along with non-aligned load and store instructions. The provision of load/locked and store/conditional instructions permits the implementation of atomic byte writes. By providing a conditional move instruction, many short branches can be eliminated altogether. A conditional move instruction tests a register and moves a second register to a third if the condition is met; this function can be substituted for short branches and thus maintain the sequentiality of the instruction stream.
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Sites Richard L.
Witek Richard T.
Digital Equipment Corporation
Fisher Arthur W.
Maloney Denis G.
Mohamed Ayni
Teska Kevin J.
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