Boots – shoes – and leggings
Patent
1980-08-28
1983-11-22
Springborn, Harvey E.
Boots, shoes, and leggings
G06F 1516, G06F 1540, G06F 922
Patent
active
044173024
ABSTRACT:
A system comprising several peripheral microprocessors are connected to a central processor through a common bus. Each processor may access the bus using an interrupt signal. In order to avoid conflicts among processors in accessing the bus, processors are designated with decreasing priority. A processor which accesses the bus by using said interrupt signal generates at the same time an inhibit signal which prevents processors having a lower priority from emitting a said interrupt signal. In order to reduce the propagation time, a bypass network for the inhibit signal is associated with each processor and a propagation path is provided for the inhibit signal in the form of a matrix.
REFERENCES:
patent: 3800287 (1974-03-01), Albright
patent: 3832692 (1974-08-01), Henzel
patent: 3866181 (1975-02-01), Gayman
patent: 4106104 (1978-08-01), Nitta
patent: 4123794 (1978-10-01), Matsumoto
Electronik, vol. 28, No. 15, Jul. 1979, pp. 66-69-German Publication-Hillers et al.
Strietelmeier-Arbitration Array for Device Connection to I/O Channels-IBM TDB-vol. 22, No. 12, May 1980, pp. 5237-5238.
R. Jaswa-Designing Interrupt Structures for Multiprocessor Systems, Compute Design, vol. 7, No. 9, Sep. 1978, pp. 101-110.
Chimienti Domenico
Vercesi Arturo
Grayson George
Honeywell Information Systems Inc.
Prasinos Nicholas
Springborn Harvey E.
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