Bypass capacitors for chip and wire circuit assembly

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices

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Details

257724, 257777, 257306, 257532, H01L 2334

Patent

active

058641777

ABSTRACT:
Stacked die that are separated by an overlaying chip capacitor with a plate bonded to the bottom of the top die with a conductive adhesive and the capacitor shell bonded to the top of the lower die with a non-conductive adhesive. The lower die is attached to a substrate using a conductive adhesive. Conductors extend from edge terminals on the substrate to edge terminals on the lower die, and conductors extend from the lower die terminals to the capacitor that are tiered to provide space between the die for the wires and connections. A second overlaying capacitor is attached to the top of the upper die with non-conducive adhesive. Pads on the capacitor are connected by conductors to edge pads on the die and conductors extend from the pads to pads on the substrate.

REFERENCES:
patent: 5281846 (1994-01-01), Kaiser
patent: 5377072 (1994-12-01), Sparkman et al.
patent: 5528083 (1996-06-01), Malladi et al.

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