Pulse or digital communications – Receivers – Interference or noise reduction
Patent
1994-03-29
1997-05-20
Kriess, Kevin A.
Pulse or digital communications
Receivers
Interference or noise reduction
375357, 375356, 455133, 455 73, 395556, H04B 712
Patent
active
056319312
ABSTRACT:
A bus type clock supplying system in a communication system with master-slave synchronization includes communication cards connected with transmission lines within a communication system and a clock bus. Each communication card includes a clock supplying section including a frequency divider for extracting a clock from the transmission lines and a tri-state device outputting the clock to the clock bus; a clock receiving section including a clock selector for selecting one clock from a plurality of the bus-type clock lines, and a frequency multiplier for multiplying the frequency of the selected clock; and a monitoring and controlling section having a function of monitoring interruption of clock input, abnormalities in the frequency multiplier, etc., and a function of controlling the tri-state device and the clock selector.
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Easy Digital Exchange, published by Electric Communication Association, Jan. 1983, pp. 156-161.
Fujio Toshihide
Takano Masataka
Hitachi , Ltd.
Hitachi Communication Systems, Inc.
Kriess Kevin A.
Toplu Lucien
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