Patent
1994-09-26
1996-01-09
Ray, Gopal C.
395309, 395840, G06F 1300
Patent
active
054836425
ABSTRACT:
A processor bus linked with at least a processor, a memory bus linked with a main memory, and a system bus linked with at least an input/output device are connected to a three-way connection control system. The control system includes a bus-memory connection controller connected to address buses and control buses respectively of the processor, memory, and system buses to transfer address and control signals therebetween. The control system further includes a data path switch connected to data buses respectively of the processor, memory, and system buses to transfer data via the data buses therebetween depending on the data path control signal.
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Aburano Ichiharu
Kawaguchi Hitoshi
Kimura Koichi
Kobayashi Kazushi
Mochida Tetsuya
Auve Glenn A.
Hitachi , Ltd.
Ray Gopal C.
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