Bus system for accessing a memory in an image processing system

Image analysis – Image transformation or preprocessing – General purpose image processor

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G06K 900

Patent

active

056712995

ABSTRACT:
An image processing system includes control section which various control signals are input into and output from, at least one image data input/output section which image data are input into and output from in response to a control signal from the control section, an image memory which temporarily stores the image data input from the image data input/output section and at least one image processing section which reads out the image data from the image memory in response to a control signal from the control section and processes the image data. A data bus controller is connected to the image memory by way of a single data bus and to the image data input/output sections and the image processing sections by way of respective data buses. The controller packs a plurality of pieces of image data input thereinto from the image data input/output sections and/or the image processing sections and outputs the packed image data to the image memory in response to a control signal from the control section while unpacks packed image data input thereinto from the image memory into a plurality of pieces of image data and outputs the pieces of image data to the image data input/output sections and/or the image processing sections in response to a control signal from the control section.

REFERENCES:
patent: 4817050 (1989-03-01), Komatsu et al.
patent: 5033106 (1991-07-01), Kita
patent: 5165103 (1992-11-01), Takeda et al.
patent: 5384643 (1995-01-01), Inga et al.
patent: 5452102 (1995-09-01), Yokoyama et al.

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