Bus system

Details Bus system Bus system

1984-11-28

1988-08-30

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 1342

Patent

active

047681454

ABSTRACT:
A bus system is disclosed in which stations having a message to send request access to a parallel bus and an arbitrator responding to the requests connects the transmitters of the stations to the bus in sequence. The words of a message placed on the bus respectively represent the address of the station to which the message is to be delivered, the address of the sending station, and data. A station asserts a signal on one control line in response to its address being on the bus and asserts a signal on another control line if it cannot receive a message. Whether the entire message is placed on the bus or not by the sending station and loaded into the registers of the receiving station depends on whether or not their signals are asserted. An external data transfer means places signals to a station on another parallel bus on an external bus. The external bus is in the form of a loop so that the message eventually returns to the station that sent it. Bits are added to certain of the words in the message when it starts around the loop and the logic level of these bits when they return to the station that sent the message indicates whether the station to which the message was sent exists and, if so, whether or not the message was delivered.

REFERENCES:
patent: 4038644 (1977-07-01), Duke et al.
patent: 4041472 (1977-08-01), Shah et al.
patent: 4128883 (1978-12-01), Duke et al.
patent: 4205373 (1980-05-01), Shah et al.
patent: 4212080 (1980-07-01), Milliken
patent: 4491909 (1985-01-01), Shimizu
patent: 4511968 (1985-04-01), Fencsik et al.

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