Bus switch circuit with back-gate control during power down

Details Bus switch circuit with back-gate control during power down Bus switch circuit with back-gate control during power down

2005-04-06

2010-02-23

Tra, Quan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Utilizing three or more electrode solid-state device

C327S434000

Reexamination Certificate

active

07667525

ABSTRACT:
The bus switch with back gate control circuit includes: an NMOS transistor coupled between a first port and a second port; a PMOS transistor coupled in parallel with the NMOS transistor; a first blocking device coupled between the first port and a control node of the PMOS transistor; a second blocking device coupled between the second port and the control node of the PMOS transistor; a first pull-down device coupled to a back gate of the NMOS transistor; and a second pull-down device coupled to the back gate of the NMOS transistor, wherein the pull down device is controlled by a power supply node and the control node of the PMOS transistor.

REFERENCES:
patent: 5963080 (1999-10-01), Miske et al.
patent: 6034553 (2000-03-01), Kwong
patent: 6100719 (2000-08-01), Graves et al.
patent: 6335653 (2002-01-01), Shigehara et al.

Affiliated with

Also associated with

Rating

Bus switch circuit with back-gate control during power down does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Bus switch circuit with back-gate control during power down, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bus switch circuit with back-gate control during power down will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4167241