Bus rate adaptation and time slot assignment circuit for a sonet

Details Bus rate adaptation and time slot assignment circuit for a sonet Bus rate adaptation and time slot assignment circuit for a sonet

1996-04-24

1999-03-02

Hsu, Alpus H.

Multiplex communications

Pathfinding or routing

Through a circuit switch

370465, 370544, H04J 322, H04Q 1104

Patent

active

058780394

ABSTRACT:
An interface device is provided which may be used to perform rate adaptation and time slot assignment, in either the transmit or receive directions, in a multiplexing unit for interfacing a high rate optical carrier line to a plurality of lower rate information carrier lines. The high rate optical carrier line may be a SONET or SDH carrier line. The interface device according to the present invention may be operationally configured to provide data rate adaptation and time slot assignment between an optical carrier line operating at an OC-12 rate with lower rate lines operating according to OC-3, OC-1, DS-3, or DS-1 protocols, or even virtual channels. A plurality of identical interface devices may be cascaded together and used to perform interface support for various channels operating at various rates, merely by manipulating the operational configuration of the individual interface devices in the cascade.

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