Boots – shoes – and leggings
Patent
1983-07-28
1986-07-22
Thomas, James D.
Boots, shoes, and leggings
G06F 1314
Patent
active
046023275
ABSTRACT:
A bus master is provided with the capability to accept a data transfer task from a CPU, which includes the performance of a predetermined sequence of data transfer operations between memory and a selected peripheral controlled by a respective controller. During any one of the operations, the bus master may be requested to relinquish the bus so that a higher priority transfer may occur or a deadlock condition resolved. In response to such request, the bus master immediately terminates the current bus cycle, but remembers the state thereof at the time of relinquishment. After the high priority transfer is completed, the bus master may be allowed to rearbitrate for use of the bus. Upon again obtaining control of the bus, the bus master restarts the bus cycle which was prematurely terminated and continues the sequence of operations as if no relinquishment had occurred.
REFERENCES:
patent: 4208714 (1980-06-01), Eklund et al.
patent: 4257095 (1981-03-01), Nadir
patent: 4348722 (1982-09-01), Gunter et al.
patent: 4381542 (1983-04-01), Binder et al.
patent: 4390944 (1983-06-01), Quackenbush et al.
patent: 4488228 (1984-12-01), Crudele et al.
LaViolette William P.
Mothersole David S.
Zolnowsky John
Lee Thomas
Motorola Inc.
Myers Jeffrey Van
Sarli, Jr. Anthony J.
Thomas James D.
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