Bus interface structure and system for controlling the bus inter

Details Bus interface structure and system for controlling the bus inter Bus interface structure and system for controlling the bus inter

1995-02-22

1997-01-14

Bowler, Alyssa H.

Boots, shoes, and leggings

395250, 395853, 364239, 364DIG1, G06F 1328

Patent

active

055948782

ABSTRACT:
A bus interface system has a bus interface, a common memory, a local bus, and a memory controller for use in a memory control. The memory controller has a buffer and is connected to the local bus. The bus interface has a burst disassembling control circuit which disassembles burst transfer data into one or a plurality of block transfers and one or a plurality of one-word transfers, which are supplied to the memory controller so that when the bus interface receives all requested data received from the common memory during a read access, the bus interface adds information on a destination device, connected to a system bus, to all the requested data and sends all the requested data with that information to the destination device via the system bus.

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patent: 5097409 (1992-03-01), Schwartz et al.
patent: 5249279 (1993-09-01), Schmenk et al.
patent: 5255378 (1993-10-01), Crawford et al.

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