Static information storage and retrieval – Magnetic bubbles – Guide structure
Patent
1995-03-29
1998-03-17
Lall, Parshotam S.
Static information storage and retrieval
Magnetic bubbles
Guide structure
395309, 36518905, 365206, G06F 300
Patent
active
057297649
ABSTRACT:
A bus interface circuit which can suppress generation of noise includes, between an internal data bus and an external data bus, an AND gate and output buffer connected in parallel with an input buffer. A control signal a is supplied to a control terminal of the output buffer and an inverted signal of the control signal a is supplied to a control terminal of the input buffer. A control signal b is supplied to one input terminal of the AND gate. When no access request is made to an external RAM and external ROM, a CPU enables the control signals a and b to be output as a high-level and a low-level signals, respectively. At that time, a respective output buffer enables corresponding data to pass through, but data on the internal data bus is not output to the external data bus when the AND gate is placed in closed state.
REFERENCES:
patent: 4468753 (1984-08-01), Berger
patent: 4739323 (1988-04-01), Miesterfeld
patent: 4837736 (1989-06-01), Donaldson et al.
patent: 4866309 (1989-09-01), Bonke et al.
patent: 5005156 (1991-04-01), Takai
patent: 5291080 (1994-03-01), Amagasaki
patent: 5369611 (1994-11-01), Miura
patent: 5378944 (1995-01-01), Gochi
Casio Computer Co. Ltd.
Lall Parshotam S.
Vu Viet
LandOfFree
Bus interface circuit of integrated circuit and input/output buf does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Bus interface circuit of integrated circuit and input/output buf, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bus interface circuit of integrated circuit and input/output buf will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-967636