Boots – shoes – and leggings
Patent
1987-02-24
1989-05-16
Zache, Raulfe B.
Boots, shoes, and leggings
G06F 300
Patent
active
048315206
ABSTRACT:
A processor for use in a digital data processing system includes a bus interface circuit for transferring data to and from other units in the system and for controlling the transfer of information within the processor over an internal bus. The bus interface circuit includes two state machines, one for controlling the internal transfers of information, and the other for controlling the external transfers of information. The state machines communicate through flags which indicate when external operations are pending. A plurality of latches are provided to receive write data, a write address and a read address from other portions of the processor, and an input latch receives signals from other units in the system, thereby allowing both a wire operation and a read operation to be initiated at the same time. The processor continues operating unless another operation is required.
REFERENCES:
patent: 4503535 (1985-03-01), Budde et al.
Jain Anil K.
Rubinfeld Paul I.
Digital Equipment Corporation
Zache Raulfe B.
LandOfFree
Bus interface circuit for digital data processor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Bus interface circuit for digital data processor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bus interface circuit for digital data processor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2328243