Pulse or digital communications – Transceivers
Reexamination Certificate
1999-02-25
2001-05-08
Pham, Chi (Department: 2631)
Pulse or digital communications
Transceivers
C375S213000
Reexamination Certificate
active
06229845
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a system wherein system components communicate via a communications bus. More particularly, the invention relates to bus interface modules for a computer systems.
2. Description of the Related Art
An exemplary communications system comprises a central processing unit and external functional modules within a computer which communicate via an internal communications bus. Another example is a communications system comprising at least two computers which communicate via an external communications bus. Each computer forms with one or more peripheral devices an individual communications system wherein communication occurs via communications buses. The peripheral devices can include, for example, external or internal disk drives, printers, scanners or data communications devices.
The computer and the peripheral devices communicate via a communications bus. The communications bus is a set of conductors connecting various functional units within a computer and connecting peripheral devices to the computer. The conductors usually extend parallel to each other in a cable, or across a substrate. The substrate is, for example, a semiconductor or a printed circuit board (PCB). The conductors are isolated from each other and are isolated from an electrically conducting substrate by a dielectric material. The thickness of the dielectric material contributes to a capacitance between a conductor and the support, and a capacitance between two adjacent conductors. These capacitances are referred to as parasitic capacitances and generally have negative influences on the transmission characteristics of the bus. The parasitic capacitances induce a propagation delay of signals travelling along the bus, and induce crosstalk between the conductors.
One example of a communications bus is a bus in accordance with a Small Computer System Interface (SCSI) standard. SCSI-II has been standardized as ANSI STD. The SCSI standard is a processor-independent standard for system-level interfacing between a computer and intelligent devices, including hard disks, floppy disks, CD-ROM, printers, scanners and many more. With the SCSI standard, up to fifteen devices can be connected to a single controller (or “host adapter”) on the computer's bus. The SCSI standard allows sixteen bits to be transferred in parallel (eight-bit bus) and can operate in either asynchronous or synchronous modes. The synchronous transfer rate is up to 60 Mbit/s. SCSI connections normally use “single-ended” drivers as opposed to differential drivers. Single-ended SCSI connections can support up to six meters of cable. Differential SCSI connections can support up to 25 meters of cable. Further details of the SCSI bus are described in a book entitled “SCSI Understanding the Small Computer System Interface,” PTR Prentice Hall, Englewood Cliffs, N.J. 07632, ISBN 0-13-796855-8.
Each computer and the peripheral devices comprise interface modules which, inter alia, organize communications between the computers and between a computer and its peripheral devices in accordance with a defined communications protocol.
The interface modules include a transceiver which has a receiver and a transmitter (bus driver) to allow bidirectional data transmission. For differential transmission, two lines, referred to as “noninverted” and “inverted” or as “positive” and “negative”, are used to differentiate actual signal from noise. The bus driver of the transceiver includes a transmit amplifier to amplify a digital signal, and the receiver includes a receive amplifier to amplify the received digital signal.
In many applications, a digital signal is RUN-length encoded before it is fed to the bus driver so that the maximum number of consecutive logic “HIGH's” or “LOW's” are limited. However, applications using SCSI do not allow such an encoding of the digital signal. In these applications, the unconditioned data is fed to the bus. Thus, a data line on a SCSI bus may not change for an extended time duration. Under normal conditions, the combination of the parasitic capacitances and the limitation that the digital signal should not be encoded can cause saturation of the receiver. Saturation slows the receiver response so that the timing of the output response is not predictable.
SUMMARY OF THE INVENTION
There is therefore a need to improve data transmission over a communications bus in accordance with SCSI so that saturation of the receiver is avoided.
An aspect of the invention is a transceiver circuit for transmitting a data signal over a communications bus at a predefined bit rate. The data signal is a digital signal having first and second logic levels. The transceiver includes a transmitter which receives and modifies the data signal and feeds the modified data signal to the communications bus. The transmitter includes a drive circuit and an output circuit. The drive circuit receives the data signal and a clock (time reference) signal and generates control signals which depend on the logic level of the data signal. The control signals are serially generated when the data signal has consecutive bits of the same logic level. The output circuit receives the control signals and the data signal and generates an output signal which corresponds to the data signal, but which has a varying drive strength determined by the control signals.
A further aspect of the invention involves a bus driver interface module for transmitting a data signal having first and second logic levels over a communications bus at a predefined bit rate. The bus driver interface module includes a transmitter configured to receive and modify the data signal and to feed the modified data signal to the communications bus. The transmitter includes a drive circuit and an output circuit. The drive circuit receives the data signal and a clock signal and generates control signals which depend on the logic level of the data signal. The control signals are sequentially generated when the data signal has consecutive bits of the same logic level. The output circuit receives the control signals and the data signal, and generates an output signal which corresponds to the data signal, but has a varying drive strength determined by the control signals.
An additional aspect of the invention involves a circuit for transmitting a data signal. The circuit includes a drive circuit and an output circuit. The drive circuit receives a data signal having first and second logic levels, and generates control signals which depend on the logic level of the data signal. The control signals are sequentially generated when the data signal has consecutive bits of the same logic level. The output circuit receives the control signals and the data signal, and generates an output signal which corresponds to the data signal, but has a varying drive strength determined by the control signals.
Another aspect of the invention involves a method for driving a communications bus with a drive strength which is dependent from a data signal. The data signal has first and second logic levels. The data signal is fed to a drive circuit, and control signals are sequentially generated when the data signal has consecutive bits of the same logic level. The data signal and the sequentially generated control signals are fed to an output circuit which generates an output signal which corresponds to the data signal, and which has a drive strength which is determined by the sequentially generated control signals.
In one embodiment, a first control signal is generated when the data signal has two consecutive bits of the same logic level, and a second control signal is generated when the data signal has three consecutive bits of the same logic level. A third control signal is generated when the data signal has four consecutive bits of the same logic level. Following a change of a logic level of the data signal, the communications bus is driven with a maximal drive strength. The drive strength is sequentially reduced by means of the control signals when the data signal
Bayard Emmanuel
Knobbe Martens Olson & Bear LLP
Pham Chi
QLogic Corporation
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