Bus driver circuit with low on-chip dissipation and/or pre-biasi

Details Bus driver circuit with low on-chip dissipation and/or pre-biasi Bus driver circuit with low on-chip dissipation and/or pre-biasi

1990-07-27

1992-07-21

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307475, 307446, H03K 1716, H03K 190175

Patent

active

051325640

ABSTRACT:
The driver circuit comprises drive means (Q2) for drawing an output current from a bus line (13) in a first state of the circuit. An output diode (S1) in the path of the output current is reverse biased in a second state of the circuit to isolate the drive means from the bus line. A control current (I.sub.Q2B) for the drive transistor is drawn from the bus line (13), beyond the output diode (S1). By this means, power dissipation (heat) within the driver circuit due to the control current is eliminated. The driver circuit also comprises means (26, S3, P1) for biasing the output during connection of the circuit to a live bus line, so as to reduce noise for other circuits connected to the bus line.

REFERENCES:
patent: 3614467 (1971-10-01), Tu
patent: 4263645 (1981-04-01), Zellmer
patent: 4415817 (1983-11-01), Fletcher
patent: 4678943 (1987-07-01), Uragami et al.
patent: 4746818 (1988-05-01), Hafner
patent: 4797582 (1989-01-01), Nguyen
patent: 4883988 (1989-11-01), Ide et al.
patent: 4918329 (1990-04-01), Milby et al.
patent: 4941128 (1990-07-01), Walda et al.
patent: 4988888 (1991-01-01), Hirose et al.
patent: 5028809 (1991-07-01), Watanabe et al.
Alvarez, BiCMOS Technology and Applications, 1989, pp. 166-170.
Lim et al., A 9100 Gate ECL/TTL Compatible BiCMOS Gate Array, 1987, pp. 190-194.

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