Bus cycle signature system

Details Bus cycle signature system Bus cycle signature system

1994-05-02

1996-11-05

Beausoliel, Jr., Robert W.

Excavating

371 224, H04B 1700

Patent

active

055726690

ABSTRACT:
A bus cycle signature system for testing CPU based boards comprising a data shift register and a general shift register which receive test signals from the board under test, the signals received by the shift registers being sampled by clock signals associated with bus cycle operations performed by a CPU on the board under test. The sampled signals form a board signature which can be compared with a similarly obtained signal from a known good board to detect faults in the board under test.

REFERENCES:
patent: 4196386 (1980-04-01), Phelps
patent: 4455654 (1984-06-01), Bhaskan et al.
patent: 4807161 (1989-02-01), Comfort et al.
patent: 5287481 (1994-02-01), Lin
patent: 5329471 (1994-07-01), Swoboda et al.
patent: 5423019 (1995-06-01), Lin

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