Bus control module for a multi-stage clock distribution...

Details Bus control module for a multi-stage clock distribution... Bus control module for a multi-stage clock distribution...

2005-01-25

2005-01-25

Hsu, Alpus H. (Department: 2665)

Multiplex communications

Channel assignment techniques

Using a separate control line or bus for access control

C370S516000, C370S522000, C379S221100, C710S120000, C713S500000, C713S600000

Reexamination Certificate

active

06847652

ABSTRACT:
A bus control module as a terminal stage for a multi-stage clock/alarm distribution scheme in a signaling server organized into addressable shelves. A system timing generator provides a framed serial control signal, SFI, addressing hierarchically arranged clock distribution modules and the bus control modules, to distribute a system clock to the bus control modules. Each bus control module provides a copy of the system clock to line cards with which it interfaces. The bus control module reports alarms and status signals from its line interface cards to the system timing generator using another framed serial signal. The bus control module forwards upstream towards the system timing generator a clock signal selected from clocks signals recovered by its line interface cards from received network signals.

REFERENCES:
patent: 4495614 (1985-01-01), Aro et al.
patent: 5812882 (1998-09-01), Raji et al.
patent: 6018529 (2000-01-01), Toth
patent: 6198753 (2001-03-01), Virdee et al.
patent: 6240087 (2001-05-01), Cummings et al.
patent: 6285673 (2001-09-01), Blackburn et al.

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